There are a number of conventional processes for packaging integrated circuits. Many packaging techniques use a lead frame that has been stamped or etched from a metal (typically copper) sheet to provide electrical interconnects to external devices. One relatively recently developed package style is a micro-array package. A lead frame suitable for use in a micro-array style package includes a plurality of leads. Generally, each lead includes a contact post and the leads are etched, half-etched, or otherwise thinned relative to the contact posts. A die is electrically connected to the thinned portions of the leads via bonding wires. Generally, the die, lead frame and bonding wires are then encapsulated while leaving the bottom surfaces of the contact posts exposed to facilitate electrical connection to external devices.
Given their many advantages, micro-array packages have recently generated a great deal of interest within the semiconductor industry. Although existing micro-array lead frame based packaging techniques work well, there are continuing efforts to develop even more efficient designs and methods for packaging integrated circuits using micro-array lead frame technology.